Henri Casanova

Henri Casanova

Office: POST 310C
Tel: 808-956-2649
Email: henric@hawaii.edu


  • Ph.D. 1998, University of Tennessee, Knoxville, Tennessee
  • M.S. 1994, National Polytechnic Institute of Toulouse, France
  • B.S. 1993, Ecole Nationale Supérieure d’Electronique, d’Electrotechnique, d’Informatique et d’Hydraulique de Toulouse, France

Research Interests

High performance computing, parallel and distributed computing, parallel application scheduling, simulation of distributed applications and platforms


  • PI,”Collaborative Research: SI2-SSE: WRENCH: A Simulation Workbench for Scientific Workflow Users, Developers, and Researchers”, National Science Foundation (NSF Grant 1642369), $500,000 2017-2020.
  • co-PI, “DiRT: A Testbed for Distributed Research,” National Science Foundation (NSF Grant 0855245), $31,764 2009-2012.
  • Visiting Associate Professor, National Informatics Institute (NII), Japan, 2012-present
  • Chancellor’s Citation for Meritorious Teaching, UH Mānoa, 2018
  • Best paper award at HeteroPar, Aug. 2009

Recent Publications

  • Beyond binary search: parallel in-place construction of implicit search trees, K. Berney, H. Casanova, A. Higuchi, B. Karsin, N. Sitchinava, in Proc. of the 32nd IEEE International Parallel & Distributed Processing Symposium (IPDPS), Vancouver, Canada, May 2018.
  • Checkpointing Workflows for Fail-Stop Errors, L. Han, L.-C. Canon, H. Casanova, Y. Robert, F. Vivien, in IEEE Transactions on Computers, to appear, 2018.
  • Computing the expected makespan of task graphs in the presence of silent errors, J. Herrmann, Y. Robert, H. Casanova, in Parallel Computing, to appear, 2018.
  • High-Bandwidth Low-Latency Approximate Interconnection Networks, D. Fujiki, K. Ishii, I. Fujiwara. H. Matsutani, H. Amano, H. Casanova, M. Koibuchi, in Proc. of the 23rd IEEE Symposium on High Performance Computer Architecture (HPCA), Austin, Texas, Feb. 2017.
  • An Efficient Algorithm for the 1D Total Visibility-Index Problem, P. Afshani, M. de Berg, H. Casanova, B. Karsin, C. Lambrechts, N. Sitchinava, C. Tsirogiannis, in Proc. of Algorithm Engineering & Experiments (ALENEX), Barcelona, Spain, Jan. 2017.
  • Checkpointing Strategies for Scheduling Computational Workflows, G. Aupy, A. Benoit, H. Casanova, Y. Robert, in International Journal of Networking and Computing, 6(1), 2–26, 2016.
  • Distance Threshold Similarity Searches: Efficient Trajectory Indexing on the GPU, M. Gowanlock, H. Casanova, in IEEE Transactions on Parallel and Distributed Systems, 27(9), 2533– 2545, 2016


  • Spring 2019
    • ICS 312 Machine-Level and Systems Programming
    • ICS 332 Operating Systems
  • Fall 2019
    • ICS 332 Operating Systems


  • Director: Concurrency Research Group (CoRG)
  • ABET-accreditation lead (2015-present)
  • Department Associate Chair (2015)
  • ICS Department Graduate Chair (2009-2013, Fall 2018)

Professional Activities

  • Subject Area Editor for Parallel Computing (2012-2016)
  • Local Arrangements Co-Chair, IEEE Computing Cluster Conference, 2017
  • Co-organizer: INRIA Workshop on Scheduling Algorithms for Exascale, Dagstuhl Schloss, Germany, Sep. 2013.