ICS2001-05-01: The Hardware Subroutine Approach to Developing Custom Co-Processors - M. Waterson

The Hardware Subroutine Approach to developing a reconfigurable, custom co-processor is an architecture and a process for implementing a hardware subsystem as a direct replacement for a subroutine in a larger program.The approach provides a framework that helps the developer analyze the trade-offs of using hardware acceleration, and a design procedure to guide the implementation process. To illustrate the design process a HWS implementation of a derivative estimation subroutine is described. In this context I show how key performance parameters of the HWS can be estimated in advance of complete implementation and decisions made regarding the potential benefit of implementation alternatives to program performance improvement. Performance of the actual hardware coprocessor is compared to the software-only implementation and to estimates developed during the design process.

ICS2001-05-01.pdf — PDF document, 404Kb