Nodari Sitchinava

Nodari Sitchinava
Assistant Professor

Office: POST 309C
Tel: 808-956-3581
Email: nodari@hawaii.edu

Education

  • Ph.D. 2009, University of California, Irvine
  • M.Eng. 2003, Massachusetts Institute of Technology
  • S.B. 2002, Massachusetts Institute of Technology

Research Interests

Computational models for multicores and GPUs, parallel external memory and cache-oblivious algorithms, parallel data structures, energy-efficient computation, distributed processing of massive data

Honors/Awards

  • PI, “AitF: FULL: Collaborative Research: Provably Efficient GPU Algorithms”, National Science Foundation (NSF Grant 1533823), $400,000, 2015-2019.
  • PI, “Hawaiian Workshop on Parallel Algorithms and Data Structures”, National Science Foundation (NSF Grant 1745331), $40,346, 2017-2018

Recent Publications

  • B. Karsin, V. Weichert, H. Casanova, J. Iacono, N. Sitchinava. “Analysis-driven engineering of comparison-based sorting algorithms on GPUs”. In Proceedings of the 32nd ACM International Conference on Supercomputing (ICS), pages 86-95, 2018.
  • K. Berney, H. Casanova, A. Higuchi, B. Karsin, N. Sitchinava. “Beyond binary search: parallel in-place construction of implicit search tree layouts”. In Proceedings of the 32nd International Parallel and Distributed Processing Symposium (IPDPS), pages 1070-1079, 2018.
  • P. Afshani, M. deBerg, H. Casanova, B. Karsin, C. Lambrechts, N. Sitchinava, C. Tsirogiannis. “An efficient algorithm for the 1D total visibility-index problem and its parallelization”. Journal of Experimental Algorithmics, 23 (2): 2.3:1-2.3:23 (2018).
  • N. Sitchinava and D. Strash. “Reconstructing Generalized Staircase Polygons with Uniform Step Length”. Journal of Graph Algorithms and Applications, 22 (3): 431-459 (2018).
  • R. Jacob, N. Sitchinava. Lower bounds in the Asymmetric External Memory model. In Proceedings of the 29th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA), pages 247- 254, 2017.

Courses

Service

Professional Activities

  • 30th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA), 2018, Program Committee Member
  • 20th Meeting on Algorithm Engineering & Experiments (ALENEX), 2018, Program Committee Member
  • 31st IEEE International Parallel & Distributed Processing Symposium (IPDPS), 2017, Program Committee Member